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PD - 95596
IRLI3615PBF
HEXFET(R) Power MOSFET
l l l l l l l
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated Lead-Free
D
VDSS = 150V
G S
RDS(on) = 0.085 ID = 14A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing.
TO-220 FULLP AK
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
14 9.8 56 45 0.30 16 340 8.4 4.5 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient
Typ.
--- ---
Max.
3.3 65
Units
C/W
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IRLI3615PBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Min. Typ. Max. Units Conditions 150 --- --- V VGS = 0V, ID = 250A --- 0.18 --- V/C Reference to 25C, ID = 1mA --- --- 0.085 VGS = 10V, ID = 8.4A --- --- 0.095 VGS = 5.0V, ID = 8.4A 1.0 --- 2.0 V VDS = VGS, ID = 250A 14 --- --- S VDS = 50V, ID = 8.4A --- --- 25 VDS = 150V, VGS = 0V A --- --- 250 VDS = 120V, VGS = 0V, TJ = 150C --- --- 100 VGS = 16V nA --- --- -100 VGS = -16V --- --- 140 ID = 8.4A --- --- 9.5 nC VDS = 120V --- --- 53 VGS = 10V, See Fig. 6 and 13 --- 8.3 --- VDD = 75V --- 20 --- ID = 8.4A ns --- 110 --- RG = 6.2, VGS = 10V --- 53 --- RD = 8.9, See Fig. 10 Between lead, 4.5 6mm (0.25in.) nH from package --- 7.5 --- G and center of die contact --- 1600 --- VGS = 0V --- 290 --- pF VDS = 25V --- 150 --- = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Q rr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 14 showing the A G integral reverse --- --- 56 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 8.4A, VGS = 0V --- 180 270 ns TJ = 25C, IF = 8.4A --- 1130 1700 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 9.5mH RG = 25, I AS = 8.4A. (See Figure 12) ISD 8.4A, di/dt 510A/s, VDD V(BR)DSS, TJ 175C.
Pulse width 300s; duty cycle 2%. Caculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the package refer to Design Tip # 93-4.
2
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IRLI3615PBF
100
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP
10
10
2.7V
2.7V
1 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.5
I D , Drain-to-Source Current (A)
TJ = 25 C TJ = 175 C
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 14A
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0
10
1 2.0
V DS = 50V 20s PULSE WIDTH 3.0 4.0 5.0 6.0 7.0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRLI3615PBF
100000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
20
ID = 8.4A VDS = 120V VDS = 75V VDS = 30V
VGS , Gate-to-Source Voltage (V)
16
10000
C, Capacitance(pF)
Ciss
1000
12
Coss
100
8
Crss
4
10 1 10 100 1000
0 0 20 40 60
FOR TEST CIRCUIT SEE FIGURE 13
80 100 120 140
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
ISD , Reverse Drain Current (A)
10
TJ = 175 C
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
100
10
100s 1ms
1
TJ = 25 C
1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 100
10ms
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRLI3615PBF
14 12
V DS VGS RG
RD
D.U.T.
+
ID , Drain Current (A)
10 8 6 4 2 0 25 50 75 100 125 150 175
-VDD
10V
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
VDS 90%
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
D = 0.50 1 0.20 0.10 0.05 PDM 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 10 t1 t2
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLI3615PBF
EAS , Single Pulse Avalanche Energy (mJ)
1000
TOP
800
15V
BOTTOM
ID 3.4A 5.9A 8.4A
VDS
L
DRIVER
600
RG
20V
D.U.T
IAS tp
+ V - DD
A
400
0.01
Fig 12a. Unclamped Inductive Test Circuit
200
0 25 50 75 100 125 150 175
V(BR)DSS tp
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRLI3615PBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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IRLI3615PBF
TO-220 Full-Pak Package Outline
Dimensions are shown in millimeters (inches)
TO-220 Full-Pak Part Marking Information
E XAMP L E : T H IS IS AN IR F I840G WIT H AS S E MB L Y L OT CODE 3432 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " P AR T N U MB E R IN T E R N AT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE
IR F I840G 924K 34 32
Note: "P" in assembly line position indicates "Lead-Free"
D AT E COD E YE AR 9 = 1999 WE E K 24 L IN E K
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04
8
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